TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 112

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

TA0REG-WR
(4) 8-bit PWM (Pulse width modulation) output mode
TA0IN
φT16
φT1
φT4
(INTTA0 interrupt)
TA01RUN<TA0RDE>
resolution of 8 bits can be output.
used as P71). TMRA1 can also be used as an 8-bit timer.
timer register TA0REG or when 2
TA01MOD<PWM01:00>). The up counter UC0 is cleared when 2
occurs.
TA01MOD<TA0CLK1:0>
This mode is only valid for TMRA0. In this mode, a PWM pulse with the maximum
When TMRA0 is used the PWM pulse is output on the TA1OUT pin (which is also
The timer output is inverted when the up counter (UC0) matches the value set in the
The following conditions must be satisfied before this PWM mode can be used.
TA0REG and
UC0 match
Value set in TA0REG < value set for 2
Value set in TA0REG ≠ 0
Selector
TA1OUT
overflow
Selector
Figure 3.7.17 Block Diagram of 8-Bit PWM Mode
2
n
Shift trigger
Figure 3.7.16 8-Bit PWM Waveforms
Internal data bus
8-bit up counter
Register buffer
Comparator
TA0REG
(UC0)
91C025-110
n
counter overflow occurs (n = 6, 7 or 8 as specified by
TA01RUN<TA0RUN>
Clear
overflow
control
2
n
n
Overflow
counter overflow
(PWM cycle)
t
PWM
TA01MOD
<PWM01:00>
TA1OUT
TAFF1
n
Invert
counter overflow
TMP91C025
INTTA0
TA1FFCR
<TA1FFIE>
2007-02-28