TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 78

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

CTS , CTS1
SCLK0, SCLK 1
input
0
(2) Port C1, C4 (RXD0, RXD1)
(3) Port C2 (
SCLK0, 1
channels. In case of use RXD0/RXD1, it is possible to logical invert by setting the
register PC<PC1, PC4>.
input/output for the serial channels. In case of use
invert by setting the register PC<PC2, PC5>.
PC write
Output latch
output
Port C1 and C4 are I/O port pins and can also is used as RXD input for the serial
Port C2 and C5 are I/O port pins and can also is used as
PC read
S
Logical invert
Ditection control
Function control
PCFC write
PCCR write
(on bit basis)
CTS
(on bit basis)
Reset
Logical invert
0
, SCLK0), C5 (
RXD0,
RXD1
Ditection control
Output latch
PCCR write
PC write
(on bit basis)
Figure 3.5.24 Port C1 and C4
PC read
Figure 3.5.25 Port C2 and C5
Reset
S
B
A
Selector
S
Logical invert
91C025-76
CTS
Selector
1
Selector
, SCLK1)
S
S
B
A
A
B
CTS
, SCLK, it is possible to logical
(Programmable pull-up)
PC2 (SCLK0,
PC5 (SCLK1,
CTS
CTS
CTS
input or SCLK
PC1 (RXD0)
PC4 (RXD1)
0
1
)
TMP91C025
)
2007-02-28