TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 152
TMP91xy25FG
Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP91XY25FG.pdf
(260 pages)
Specifications of TMP91xy25FG
Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
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for the purposes of this explanation.
•
•
(Setting example)
To link two slave controllers serially with the master controller using the internal
clock f
Since serial channels 0 and 1 operate in exactly the same way, channel 0 only is used
Main
PCCR
PCFC
INTES0
SC0MOD0
SC0BUF
INTTX0 interrupt
SC0MOD0
SC0BUF
Main
PCCR
PCFC
PCODE
INTES0
SC0MOD0
INTRX0 interrupt
Acc ← SC0BUF
if Acc = Select code
Then SC0MOD0 ← − − − 0 − − − −
Setting the master controller
Setting the slave controller
TXD
SYS
Master
as the transfer clock.
RXD
← − − − − − − 0 1
← X X − X − − X 1
← 1 1 0 0 1 1 0 1
← 1 0 1 0 1 1 1 0
← 0 0 0 0 0 0 0 1
← − − − − − − 0 1
← X X − X − − X 1
← X X X X − X X 1
← 1 1 0 1 1 1 1 0
← 0 0 1 1 1 1 1 0
Figure 3.9.24 UART Block Connection
← 0 − − − − − − −
← * * * * * * * *
91C025-150
TXD
Select code
00000001
Slave 1
Clear <WU> to 0.
RXD
Enable INTRX0 and INTTX0.
Set <WU> to 1 in 9-bit UART transmission mode using f
as the transfer clock.
Set PC1 to RXD and PC0 to TXD0 (Open-drain output).
Set PC0 and PC1 to function as the TXD0 and RXD0 pins
respectively.
Enable the INTTX0 interrupt and set it to interrupt level 4.
Enable the INTRX0 interrupt and set it to interrupt level 5.
Set f
Set the select code for slave controller 1.
Set TB8 to 0.
Set data for transmission.
SYS
as the transmission clock for 9-bit UART mode.
TXD
Select code
00001010
Slave 2
RXD
TMP91C025
2007-02-28
SYS
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