MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 87
![BOARD DEVELOPMENT SYSTEM 8544](/photos/37/58/375876/mpc8544e_sml.jpg)
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
- Current page: 87 of 1340
- Download datasheet (12Mb)
Table
Number
21-4
21-5
21-6
21-7
21-8
21-9
21-10
21-11
21-12
21-13
21-14
21-15
21-16
21-17
21-18
21-19
21-20
21-21
21-22
21-23
21-24
21-25
21-26
21-27
21-28
21-29
21-30
B-1
Freescale Semiconductor
Watchpoint and Trigger Signals—Detailed Signal Descriptions .......................................... 21-8
JTAG Test and Other Signals—Detailed Signal Descriptions .............................................. 21-8
Debug and Watchpoint Monitor Memory Map................................................................... 21-10
WMCR0 Field Descriptions................................................................................................ 21-11
WMCR1 Field Descriptions................................................................................................ 21-13
WMAR Field Descriptions ................................................................................................. 21-13
WMAMR Field Descriptions.............................................................................................. 21-14
WMTMR Field Descriptions .............................................................................................. 21-14
Transaction Types By Interface........................................................................................... 21-15
WMSR Field Descriptions .................................................................................................. 21-16
TBCR0 Field Descriptions.................................................................................................. 21-17
TBCR1 Field Descriptions.................................................................................................. 21-18
TBAR Field Descriptions.................................................................................................... 21-19
TBAMR Field Descriptions ................................................................................................ 21-19
TBTMR Field Descriptions ................................................................................................ 21-20
TBSR Field Descriptions .................................................................................................... 21-21
TBACR Field Descriptions ................................................................................................. 21-22
TBADHR Field Descriptions.............................................................................................. 21-22
TBADR Field Descriptions................................................................................................. 21-23
PCIDR Field Descriptions .................................................................................................. 21-23
CCIDR Field Descriptions .................................................................................................. 21-24
TOSR Field Descriptions .................................................................................................... 21-25
Source and Target ID Values............................................................................................... 21-25
CMD Trace Buffer Entry Field Descriptions (TBCR1[IFSEL] = 000) .............................. 21-28
DDR Trace Buffer Entry Field Descriptions (TBCR1[IFSEL] = 001) ............................... 21-29
PCI Trace Buffer Entry Field Descriptions
PCI Express Trace Buffer Entry Field Descriptions
Memory Map...........................................................................................................................B-1
(TBCR1[IFSEL] = 010) ................................................................................................. 21-30
(TBCR1[IFSEL] = 100 or 101 or 110)........................................................................... 21-30
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Tables
Title
Number
Page
lxxxvii
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