MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 1187
![BOARD DEVELOPMENT SYSTEM 8544](/photos/37/58/375876/mpc8544e_sml.jpg)
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
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- Download datasheet (12Mb)
19.4.1.20 DDR Calibration Status Register (DDRCSR)
Shown in
Table 19-23
19.4.1.21 DDR Control Driver Register (DDRCDR)
Shown in
SDRAM controller.
Freescale Semiconductor
Offset 0xE_0B24
Reset
Offset 0xE_0B20
Reset
10–31
Bits
0–1
2–5
6–9
W
R
W
R DDRDC
DHC_EN DSO_EN DSO_PZ DSO_NZ DSO_PZ_OE DSO_NZ_OE ODT
0
0
Figure
Figure
describes the bit settings of DDRCSR.
1
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
DDRDC
Name
19-20, the DDRCSR contains debug status bits from the DDR SDRAM controller.
19-21, the DDRCDR contains bits that allow control over the I/O drivers of the DDR
2
PZ
NZ
—
1
PZ
Figure 19-20. DDR Calibration Status Register (DDRCSR)
2
Figure 19-21. DDR Control Driver Register (DDRCDR)
5
DDR driver compensation input value.
This field reflects the current state of the MDIC[0:1] driver impedance calibration signals.
Current setting of PFET driver impedance (Field values not defined below are reserved.)
0000 Highest impedance; half strength
1000 Higher impedance
1100 Nominal impedance
1110 Lower impedance
1111 Lowest impedance; double strength
Current setting of NFET driver impedance (Field values not defined below are reserved.)
0000 Highest impedance; half strength
1000 Higher impedance
1100 Nominal impedance
1110 Lower impedance
1111 Lowest impedance; double strength
Reserved
6
5 6
Table 19-23. DDRCSR Field Descriptions
NZ
9
9
10
10
All zeros
All zeros
11
Description
12
—
13
—
Access: Read Only
Access: Read/Write
Global Utilities
19-21
31
31
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