MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 1291
![BOARD DEVELOPMENT SYSTEM 8544](/photos/37/58/375876/mpc8544e_sml.jpg)
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
- Current page: 1291 of 1340
- Download datasheet (12Mb)
Freescale Semiconductor
0x3_1380–0x3
0x3_1480–0x3
0x3_13C0–0x
0x3_14C0–0x
0x3_13E0–0x
0x3_14E0–0x
0x3_1348
0x3_1408
0x3_1410
0x3_1440
0x3_1448
0x3_2000
0x3_2008
0x3_2010
0x3_2018
0x3_2028
0x3_2030
0x3_2038
0x3_2050
0x3_2100
3_13DF
3_14DF
3_13FF
3_14FF
_13BF
_14BF
Offset
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
FF3—Crypto-channel 3 fetch FIFO address register
DB3—Crypto-channel 3 descriptor buffers [0–7]
Gather link tables
Scatter link tables
CCCR4—Crypto-channel 4 configuration register
CCPSR4—Crypto-channel 4 pointer status register
CDPR4—Crypto-channel 4 current descriptor pointer
register
FF4—Crypto-channel 4 fetch FIFO address register
DB4—Crypto-channel 4 descriptor buffers [0–7]
Gather link tables
Scatter link tables
DEUMR—DEU mode register
DEUKSR—DEU key size register
DEUDSR—DEU data size register
DEURCR—DEU reset control register
DEUSR—DEU status register
DEUISR—DEU interrupt status register
DEUICR—DEU interrupt control register
DEUEUG—DEU EU go register
DEUIV—DEU initialization vector register
Data Encryption Standard Execution Unit (DEU)
Table B-1. Memory Map (continued)
Register
Channel 4
Complete List of Configuration, Control, and Status Registers
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
W
W
W
W
R
R
R
R
R
R
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0x0000_0000_
0000_0000
0000_0000
0000_0000
0000_0000
0000_0007
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
0000_3000
0000_0000
0000_0000
Reset
12.5.1.4/12-101
12.5.1.5/12-102
12.5.1.6/12-102
12.5.1.6/12-102
12.5.1.3/12-100
12.5.1.4/12-101
12.5.1.5/12-102
12.5.1.6/12-102
12.5.1.6/12-102
12.5.1.1/12-92
12.5.1.2/12-95
12.4.2.1/12-33
12.4.2.2/12-34
12.4.2.3/12-35
12.4.2.4/12-35
12.4.2.5/12-36
12.4.2.6/12-37
12.4.2.7/12-39
12.4.2.8/12-40
12.4.2.9/12-41
Section/Page
B-25
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