MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 672
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
- Current page: 672 of 1340
- Download datasheet (12Mb)
Local Bus Controller
14.4.3.7.1
The precharge-to-activate interval parameter, controlled by LSDMR[PRETOACT], defines the earliest
timing for an ACTIVATE or REFRESH command after a PRECHARGE command to the same SDRAM
bank.
14.4.3.7.2
This parameter, controlled by LSDMR[ACTTORW], defines the earliest timing for a READ/WRITE
command after an ACTIVATE command to the same SDRAM bank.
14-52
LSDDQM[0:3]
LSDDQM[0:3]
LAD[0:31]
LAD[0:31]
LSDRAS
LSDCAS
LSDRAS
LSDCAS
LSDWE
LSDWE
LCLK
LALE
LCS n
LCLK
LCS n
LALE
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
ZZZZZZZZ RAS ADD
Precharge-to-Activate Interval
Activate-to-Read/Write Interval
ZZZZZZZZ
RAS ADD
RAS ADD
PRECHARGE
Command
Figure 14-36. PRETOACT = 2 (2 Clock Cycles)
Bank A
Figure 14-37. ACTTORW = 2 (2 Clock Cycles)
1111
1111
PRETOACT = 2
XXXXX
XXXX
ACTIVATE
Command
ACTTORW = 2
CAS ADD
ACTIVATE
Command
Bank A
CAS ADD
Command
D0
WRITE
0000
D1
D0
0000
D2
D3
ZZZZZZZZ
1111
ZZZZZZZZ
Freescale Semiconductor
1111
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