MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 34

BOARD DEVELOPMENT SYSTEM 8544

MPC8544DS

Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8544DS

Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Paragraph
Number
16.5.1.2
16.5.1.3
16.5.1.4
16.5.1.5
17.1
17.1.1
17.1.1.1
17.1.1.2
17.1.2
17.1.3
17.1.3.1
17.1.3.1.1
17.1.3.1.2
17.1.3.1.3
17.1.3.2
17.1.3.3
17.1.3.4
17.2
17.3
17.3.1
17.3.1.1
17.3.1.1.1
17.3.1.1.2
17.3.1.1.3
17.3.1.2
17.3.1.2.1
17.3.1.2.2
17.3.1.2.3
17.3.1.2.4
17.3.1.3
17.3.1.3.1
17.3.1.3.2
17.3.1.3.3
17.3.1.3.4
17.3.1.4
17.3.1.4.1
xxxiv
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Introduction.................................................................................................................... 17-2
External Signal Descriptions ......................................................................................... 17-6
Memory Map/Register Definitions .............................................................................. 17-11
Overview.................................................................................................................... 17-2
Features...................................................................................................................... 17-4
Modes of Operation ................................................................................................... 17-4
PCI Memory-Mapped Registers .............................................................................. 17-11
DMA to Ethernet ................................................................................................. 16-40
DMA to Configuration, Control, and Status Registers........................................ 16-40
DMA to I
DMA to DUART ................................................................................................. 16-41
Outbound Transactions .......................................................................................... 17-3
Inbound Transactions............................................................................................. 17-4
Host/Agent Mode Configuration ........................................................................... 17-5
PCI Clocking Configuration .................................................................................. 17-5
PCI Arbiter (Internal/External Arbiter) Configuration.......................................... 17-5
PCI Impedance Configuration ............................................................................... 17-5
PCI Configuration Access Registers ................................................................... 17-14
PCI ATMU Outbound Registers.......................................................................... 17-16
PCI ATMU Inbound Registers............................................................................. 17-19
PCI Error Management Registers........................................................................ 17-23
Host Mode ......................................................................................................... 17-5
Agent Mode ....................................................................................................... 17-5
Agent Configuration Lock Mode ...................................................................... 17-5
PCI Configuration Address Register (CFG_ADDR) ...................................... 17-14
PCI Configuration Data Register (CFG_DATA) ............................................. 17-15
PCI Interrupt Acknowledge Register (INT_ACK).......................................... 17-15
PCI Outbound Translation Address Registers (POTARn) .............................. 17-16
PCI Outbound Translation Extended Address Registers (POTEARn)............ 17-16
PCI Outbound Window Base Address Registers (POWBARn)...................... 17-17
PCI Outbound Window Attributes Registers (POWARn)............................... 17-18
PCI Inbound Translation Address Registers (PITARn)................................... 17-20
PCI Inbound Window Base Address Registers (PIWBARn) .......................... 17-20
PCI Inbound Window Base Extended Address Registers
PCI Inbound Window Attributes Registers (PIWARn) ................................... 17-21
PCI Error Detect Register (ERR_DR)............................................................. 17-24
(PIWBEARn) .............................................................................................. 17-21
2
C ......................................................................................................... 16-40
PCI Bus Interface
Contents
Chapter 17
Title
Freescale Semiconductor
Number
Page

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