MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 577
![BOARD DEVELOPMENT SYSTEM 8544](/photos/37/58/375876/mpc8544e_sml.jpg)
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
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- Download datasheet (12Mb)
Table 12-53
scatter state machines.
Freescale Semiconductor
48–59
60–63
Bits
47
PTR_DW
Name
Error
Table 12-52. Crypto-Channel Pointer Status Register Field Descriptions (continued)
SD
shows the values for G_STATE and S_STATE fields, which are the states for the gather and
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
secondary EU.
0 The assigned secondary EU done interrupt is inactive.
1 The assigned secondary EU done interrupt is active indicating the EU has completed processing
is generated, this field will reflect the source of the error. The bits in the ERROR field are registered at
specific stages in the descriptor processing flow. Once registered, an error can only be cleared only by
resetting the channel or writing the appropriate registers to initiate the processing of a new descriptor.
Table 12-55
ERROR field.
shows the meaning of all possible values of the PTR_DW field.
Secondary EU done. The SEC_DONE bit reflects the state of the done interrupt from the assigned
Channel error status. This field reflects the error status of the channel. When a channel error interrupt
PTR_DW indicates which pointer-dword is currently being processed by the channel.
and is ready to provide output data.
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xA
0xB
0xC
0xD
0xE
0xF
Value
Table 12-53. G_STATE and S_STATE Field Values
lists the conditions which can cause a channel error and how they are represented in the
GS_IDLE
GS_LOAD_POINTER
GS_LOAD_POINTER_DONE
GS_LOAD_NEXT_POINTER
GS_PROCESS_POINTER
GS_TRANS_BLOCK
GS_TRANS_BLOCK_DONE
GS_TRANS_BYTES
GS_TRANS_BYTES_DONE
GS_INC_PAIR_PTR
GS_UPDATE
GS_DONE
GS_ERROR
GS_RELOAD
GS_TRANS_INBOUND
GS_TRANS_INBOUND_DONE
Gather State Machine
Description
Security Engine (SEC) 2.1
Table 12-56
12-97
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