PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 624

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

Data Sheet
Physical
Addr
F076
F078
F07A
F07C
F07E
F0B0
F0B2
F0B4
F0B6
F0D8
F0DC
F0DE
F0E0
F0E2
F0E4
F0E6
F0E8
F0EA
F0EC
F0EE
F0F0
F0F4
F0F8
F0FA
F0FC
F0FE
F100
F102
F104
F106
F108
F114
F116
F118
F11A
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Register
Name
IDMEM2
IDPROG
IDMEM
IDCHIP
IDMANUF
SSCTB
SSCRB
SSCBR
SSCCLC
DTIDR
DCMPL
DCMPLX
DCMPG
DCMPGX
DCMP0
DCMP0X
DCMP1
DCMP1X
DCMP2
DCMP2X
DTREVT
DSWEVT
DEXEVT
DIPX
DBGSR
DIP
DP0L
DP0H
DP1L
DP1H
RP0H
XBCON 1
XBCON 2
XBCON 3
XBCON 4
Type
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
8-bit
Addr
3B
3C
3D
3E
3F
58
59
5A
5B
6C
6E
6F
70
71
72
73
74
75
76
77
78
7A
7C
7D
7E
7F
80
81
82
83
84
8A
8B
8C
8D
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Description
Identifier
Identifier
Identifier
Identifier
Identifier
SSC Transmit Buffer (WO)
SSC Receive Buffer (RO)
SSC Baudrate Register
SSC Clock Control Register
Task ID register)
Hardware event range comparison register (less) 0000
8 bit extension for DCMPL
Hardware event range comparison register
(greater)
8 bit extension for DCMPG
Hardware event equal comparison register 0
8 bit extension for DCMP0
Hardware event equal comparison register 1
8 bit extension for DCMP1
Hardware event equal comparison register 2
8 bit extension for DCMP2
Specifies hardware triggers and action
Specifies action if DEBUG instruction is executed 0000
Specifies action if external break pin is asserted
Instruction pointer register extension for OCDS
Debug status register
Instruction pointer register for OCDS
P0L Direction Control Register
P0H Direction Control Register
P1L Direction Control Register
P1H Direction Control Register
System Startup Configuration Register (RO)
XBUS Control register 1 (PIDD, TSF, I2C)
XBUS Control register 2 (IOM, HDLC)
XBUS Control register 3 (USB)
XBUS Control register 4 (XRAM)
624
The Register Set
PSB 21473
2003-03-31
INCA-D
Reset
Value
0000
0000
0000
0801
1824
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
00
00
00
00
xx
0000
0000
0000
0000
H
H
H
H
H
H
H
H
H
H
H
H
H
H
1)
1)
1)
1)
1)
1)
1)
1)
1)
1)
1)
1)
1)
1)
1)
1)
1)
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H