PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 58

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

Data Sheet
CSP (FE08
Bit
SEGNR
Code memory addresses are generated by directly extending the 16-bit contents of the
IP register by the contents of the CSP register as shown in the figure below.
In the case of the segmented memory mode, the selected number of segment address
bits (via bitfield SALSEL) of register CSP is output on the respective segment address
pins of Port 4 for all external code accesses. For non-segmented memory mode, the
content of this register is not significant, because all code acccesses are automatically
restricted to segment 0.
Note: The CSP register can only be read but not written by data operations. It is,
15
-
14
-
however, modified either directly by means of the JMPS and CALLS instructions,
or indirectly via the stack by means of the RETS and RETI instructions.
Upon the acceptance of an interrupt or the execution of a software TRAP
instruction, the CSP register is automatically set to zero.
H
13
-
/ 04
Function
Segment Number
Specifies the code segment, from where the current instruction is to be fetched.
SEGNR is ignored, when segmentation is disabled.
H
)
12
-
11
-
10
-
9
-
8
-
SFR
58
7
6
5
4
SEGNR
Central Processor Unit
r
3
Reset Value: 0000
2
PSB 21473
1
2003-03-31
INCA-D
0
H