PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 181

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

12.1
The current count value of the Watchdog Timer is contained in the Watchdog Timer
Register WDT, which is a non-bitaddressable read-only register. The operation of the
Watchdog Timer is controlled by its bitaddressable Watchdog Timer Control Register
WDTCON. This register specifies the reload value for the high byte of the timer, selects
the input clock prescaling factor and provides a flag that indicates a watchdog timer
overflow.
WDTCON (FFAE
1)
After any software reset, external hardware reset (see note), or watchdog timer reset,
the watchdog timer is enabled and starts counting up from 0000
2. The input frequency may be switched to f
timer can be disabled via the instruction DISWDT (Disable Watchdog Timer). Instruction
DISWDT is a protected 32-bit instruction which will ONLY be executed during the time
between a reset and execution of either the EINIT (End of Initialization) or the SRVWDT
(Service Watchdog Timer) instruction. Either one of these instructions disables the
execution of DISWDT.
Data Sheet
The reset value depends on the Reset Source.
Bit
WDTIN
WDTR
SWR
SHWR
LHWR
WDTREL
15
More than one reset source may be visible. After EINIT all reset bits are cleared
14
1)
Operation of the Watchdog Timer
13
Function
Watchdog Timer Input Frequency Selection
‘0’: Input frequency is f
‘1’: Input frequency is f
Watchdog Timer Reset Indication Flag
Set by the watchdog timer on an overflow.
Cleared by the SRVWDT instruction.
Software Reset
Set by the command SRST
Short Hardware Reset
Set by the Input RSTIN
Long Hardware Reset
Set by the Input RSTIN or by Undervoltage Detection
Watchdog Timer Reload Value (for the high byte of WDT)
H
WDTREL
12
/ D7
rw
11
H
)
10
9
CPU
CPU
8
SFR-b
/ 2
/ 128
181
CPU
7
0
r
/128 by setting bit WDTIN. The watchdog
0
6
r
5
1
r
The Watchdog Timer (WDT)
LHW
R
4
r
Reset Value: 003C
H
with the frequency f
SHW
R
3
r
SW
2
R
r
PSB 21473
WDT
2003-03-31
R
1
r
INCA-D
WDT
H
rw
IN
0
CPU
/