PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 364

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PSB21473FV13XT

Manufacturer Part Number
PSB21473FV13XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21473FV13XT

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / RoHS Status
Compliant
Data Sheet
18.9.5
Value after reset: 00
TR_
CMD
Normally the signals in this register are generated by the layer 1 state machine. If the
internal layer 1 state machine is disabled (bit L1SW in TR_CONF = ’1’) this register can
be written by the CPU.
XINF
000: Transmit INFO 0
001: Transmit INFO 1W
010: Transmit INFO 1
011: Transmit INFO 3
100: Send continous 192 kHz pulses (Test Mode 2)
101: Send single 4 kHz pulses (Test Mode 1)
11x: reserved
PD
0: Transceiver in operational mode
1: Transceiver in power down mode. From the analog part only the level detector is
LP_A
The setting of this bit corresponds to the C/I command ARL.
0: Analog loop is open
1: Analog loop is closed
18.9.6
Value after reset: 00
ISTATR
active. Additionally no clocks are provided and the complete digital part of the
transceiver is inactive if the CFS bit is set to ’1’.
TR_CMD - Transceiver Command Register
7
ISTATR - Interrupt Status Register Transceiver
7
0
... Transmit INFO
... Power Down
... Loop Analog
XINF
H
H
-
-
0
-
364
LD
0
RIC
PD
LP_A
0
0
0
0
0
Line Transceiver
RD/WR (34
PSB 21473
2003-03-31
INCA-D
RD (38
H
H
)
)

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