PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 508

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PSB21473FV13XT

Manufacturer Part Number
PSB21473FV13XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21473FV13XT

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / RoHS Status
Compliant
Data Sheet
Figure 21-2 Timing Diagram for Keypad Scanner
The scan period for each line is approximately 1ms (T
lines are enabled, a complete scan period over all lines lasts about 9ms. A scan period
for a single line is divided into an idle phase T
levels to settle before the next line is scanned. The idle phase is approximately as long
as the active phase. Independent of the number of enabled scan lines, a new scan
period always starts after 9 x T
ms is substituted before a new interrupt is generated.
The number of scan lines is programmable via the four bit value SL0-3 in the keysan
control register KEY_CONF. This value defines the last scan line before the scanner
returns to line 0. All unused scan lines are internally set to one so that the register always
reports ‘1‘, regardless whether the pins are used as GPIO.
Interrupt Generation
If line ’0’ is driven ’LOW’, the result of scanning lines 1-9 (if 9 lines enabled, otherwise
less) is stored in register SREG0. When line ’1’ is driven ’LOW’’, lines ’2-9’ are read. The
corresponding results are stored in register SREG1 and so forth.
10
1
2
3
0
4
5
6
7
8
9
T
I
implemented half-matrix structure, it could happen that while pressing some keys,
the appropriate register contents does not reflect physically pressed keys only, but
also some “virtual” pressed keys. If, for example, keys (0,1) and (1,2) are pressed
concurrently, the key (0,2) will also be detected as “pressed”, although it is not.
T
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XXX
XXX
XXX
XXX
XXX
XXX
XXX
XXX
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SCAN
T
A
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XXX
XXX
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XXX
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XXX
XXX
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XXX
XXX
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SCAN
XXX
XXX
XXX
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XXX
. Thus, if a change occurs to the values, a delay of 9
XXX
XXX
XXX
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508
I
and an active phase T
XXX
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XXX
SCAN
XXX
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Terminal Specific Functions
in Figure 21-2), i.e. if all scan
XXX
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XXX
A
. This allows logic
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XXX
PSB 21473
2003-03-31
INCA-D
XXX

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