PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 213

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

This option is controlled by bit T5CLR in register T5CON. If T5CLR = ‘0’, the contents of
timer T5 is not affected by a capture. If T5CLR = ‘1’, timer T5 is cleared after the current
timer value has been latched into register CAPREL.
Note: Bit T5SC only controls whether a capture is performed or not. If T5SC = ‘0’, the
Figure 14-21 Timer Block 2 Register CAPREL in Capture Mode
Timer Block 2 Capture/Reload Register CAPREL in Reload Mode
This 16-bit register can be used as a reload register for the core timer T6. This mode is
selected by setting bit T6SR = ‘1’ in register T6CON. The event causing a reload in this
mode is an overflow or underflow of the core timer T6.
When timer T6 overflows from FFFF
from 0000
loaded into timer T6. This will not set the interrupt request flag CRIR associated with the
CAPREL register. However, interrupt request flag T6IR will be set indicating the
overflow/underflow of T6.
Data Sheet
input line CAPIN can still be used to clear timer T5 or as an external interrupt input.
This interrupt is controlled by the CAPREL interrupt control register CRIC.
H
to FFFF
H
(when counting down), the value stored in register CAPREL is
H
to 0000
213
H
(when counting up) or when it underflows
General Purpose Timer Unit
PSB 21473
2003-03-31
INCA-D