PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 162
PSB21473FV13XT
Manufacturer Part Number
PSB21473FV13XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21473FV13XT.pdf
(664 pages)
Specifications of PSB21473FV13XT
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / RoHS Status
Compliant
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INCA-D
PSB 21473
The External Bus Interface
or by the external memory/peripheral (for read cycles). After a period of time, which is
determined by the access time of the memory/peripheral, data become valid.
Read cycles: Input data is latched and the command signal is now deactivated. This
causes the accessed device to remove its data from the data bus which is then tri-stated
again.
Write cycles: The command signal is now deactivated. If a subsequent external bus
cycle is required, the EBC places the respective address on the address bus. The data
remain valid on the bus until the next external bus cycle is started.
Figure 11-3 Demultiplexed Bus Cycle
The bus cycle is described in number of TCL’s, where f
= 1/(2 TCL).
CPU
Switching between the Bus Modes
The EBC allows to switch between different bus modes dynamically, ie. subsequent
external bus cycles may be executed in different ways. Certain address areas may use
multiplexed or demultiplexed buses or predefined waitstates.
A change of the external bus characteristics can be initiated in two different ways:
Reprogramming the BUSCON and/or ADDRSEL registers allows to either change
the bus mode for a given address window, or change the size of an address window that
uses a certain bus mode. Reprogramming allows to use a great number of different
Data Sheet
162
2003-03-31
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