PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 597
PSB21473FV13XT
Manufacturer Part Number
PSB21473FV13XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21473FV13XT.pdf
(664 pages)
Specifications of PSB21473FV13XT
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / RoHS Status
Compliant
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Figure 24-3 Reset Input and Output Signals
24.6.1
The RSTOUT pin is dedicated to generate a reset signal for the system components
besides the controller itself. RSTOUT will be driven active (low) at the begin of any reset
sequence (triggered by hardware, the SRST instruction or a watchdog timer overflow).
RSTOUT stays active (low) beyond the end of the internal reset sequence until the
protected EINIT (End of Initialization) instruction is executed (see figure above). This
allows the complete configuration of the controller including its on-chip peripheral units
before releasing the reset signal for the external peripherals of the system.
Data Sheet
When the internal reset condition is prolongued by RSTIN, the activation of the output signals is
delayed until the end of the internal reset condition.
1) Current bus cycle is completed or aborted.
2) Switches asynchronously with RSTIN, synchronously upon software or watchdog reset.
3) The reset condition ends here. The INCA-D starts program execution.
4) Activation of the I/O pins is controlled by software.
5) Execution of the EINIT instruction.
6) The shaded area designates the internal reset sequence, which starts after synchronization of RSTIN.
Reset Output Pin
597
System Reset
PSB 21473
2003-03-31
INCA-D
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