PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 329

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PSB21473FV13XT

Manufacturer Part Number
PSB21473FV13XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21473FV13XT

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / RoHS Status
Compliant
17.5.1.16 TMH -Test Mode Register HDLC
Value after reset: 00
TMH
TLP
The TX path of layer-2 is internally connected with the RX path of layer-2. Data coming
from the layer 1 controller will not be forwarded to the layer 2 controller.
Bit 7:1 have always be programmed to ’0’
17.5.1.17 CIR0 - Command/Indication Receive 0
Value after reset: F3
CIR0
CODR0
Value of the received Command/Indication code. A C/I-code is loaded in CODR0 only
after being the same in two consecutive IOM-frames and the previous code has been
read from CIR0.
CIC0
A change in the received Command/Indication code has been recognized. This bit is set
only when a new code is detected in two consecutive IOM-frames. It is reset by a read
of CIR0.
CIC1
A change in the received Command/Indication code in IOM-channel 1 has been
recognized. This bit is set when a new code is detected in one IOM-frame. It is reset by
a read of CIR0.
S/G
Indicates the availability of the D-channel on the line interface.
1: Stop
0: Go
Data Sheet
7
7
0
... Test Loop
... C/I Code 0 Receive
... C/I Code 0 Change
... C/I Code 1 Change
... Stop/Go Bit Monitoring
H
H
0
CODR0
0
IOM-2 Handler, TIC/CI Handler and HDLC Controller
0
329
CIC0
0
CIC1
0
S/G
0
0
0
BAS
TLP RD/WR (29
PSB 21473
2003-03-31
RD (2E
INCA-D
H
H
)
)

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