PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 194
PSB21473FV13XT
Manufacturer Part Number
PSB21473FV13XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21473FV13XT.pdf
(664 pages)
Specifications of PSB21473FV13XT
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / RoHS Status
Compliant
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Data Sheet
Figure 14-5 Block Diagram of Core Timer T3 in Counter Mode
Table 14-3
T3I
0 0 0
0 0 1
0 1 0
0 1 1
1 X X
For counter operation, a port pin P3.6/T3IN must be configured as input. The maximum
input frequency which is allowed in counter mode is f
transition of the count input signal which is applied to T3IN is correctly recognized, its
level should be held high or low for at least 4 f
Timer 3 in Incremental Interface Mode
Incremental Interface mode for the core timer T3 is selected by setting bit field T3M in
register T3CON to ‘110
(configured as timer input T3IN) and pin P3.5/T3EUD (configured as timer input) are
used to interface to an incremental encoder.
Note: In the INCA-D, the T3EUD timer input is connected to P3.5. In this case, Timer 4
input T4IN can be used only by Software.
Core Timer T3 (Counter Mode) Input Edge Selection
Triggering Edge for Counter Increment / Decrement
None. Counter T3 is disabled
Positive transition (rising edge) on T3IN
Negative transition (falling edge) on T3IN
Any transition (rising or falling edge) on T3IN
Reserved. Do not use this combination
B
’ or ‘111
B
’. In incremental interface mode pin P3.6/T3IN
194
Timer
cycles (FM1 = ’1’) before it changes.
Timer
/8 (FM1 = ’1’). To ensure that a
General Purpose Timer Unit
PSB 21473
2003-03-31
INCA-D
x = 3
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