PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 268

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

Data Sheet
Slave
(<SSCxBR> = ’FFFF
16.4
The SSCx is able to detect four different error conditions. Receive Error and Phase Error
are detected in all modes, while Transmit Error and Baudrate Error only apply to slave
mode. When an error is detected, the respective error flag is set. When the
corresponding Error Enable Bit is set, also an error interrupt request will be generated
by setting SSCxEIR (see figure below). The error interrupt handler may then check the
error flags to determine the cause of the error interrupt. The error flags are not reset
automatically (like SSCxEIR), but rather must be cleared by software after servicing.
This allows servicing of some error conditions via interrupt, while the others may be
polled by software.
Note: The error interrupt handler must clear the associated (enabled) errorflag(s) to
A Receive Error (Master or Slave mode) is detected, when a new data frame is
completely received, but the previous data was not read out of the receive buffer register
SSCxRB. This condition sets the error flag SSCxRE and, when enabled via SSCxREN,
the error interrupt request flag SSCxEIR. The old data in the receive buffer SSCxRB will
be overwritten with the new value and is unretrievably lost.
A Phase Error (Master or Slave mode) is detected, when the incoming data at pin MRST
(master mode) or MTSR (slave mode), sampled with the same frequency as the CPU
clock, changes between one sample before and two samples after the latching edge of
the clock signal (see “Clock Control”). This condition sets the error flag SSCxPE and,
when enabled via SSCxPEN, the error interrupt request flag SSCxEIR.
A Baud Rate Error (Slave mode) is detected, when the incoming clock signal deviates
from the programmed baud rate by more than 100%, ie. it either is more than double or
less than half the expected baud rate. This condition sets the error flag SSCxBE and,
when enabled via SSCxBEN, the error interrupt request flag SSCxEIR. Using this error
detection capability requires that the slave's baud rate generator is programmed to the
same baud rate as the master device. This feature detects false additional, or missing
pulses on the clock line (within a certain frame).
Note: If this error condition occurs and bit SSCxAREN=’1’, an automatic reset of the
prevent repeated interrupt requests.
SSCx will be performed in case of this error. This is done to reinitialize the SSCx,
if too few or too many clock pulses have been detected.
Mode
Error Detection Mechanisms
-
H
’ = ’65535
).
The
D
’).
minimum
The High-Speed Synchronous Serial Interfaces
268
baud
rate
is
274.66
PSB 21473
2003-03-31
INCA-D
Baud