PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 309

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

After the last byte of the frame has been transmitted the HDLC controller releases an
XPR interrupt and the host may proceed with transmission of a new frame.
Figure 17-22 Transmission Sequence, Example
17.3.5.4 Transmit Frame Structure
The transmission of transparent frames (XTF command) is shown in figure
For transparent frames, the whole frame including address and control field must be
written to the XFIFO. The host configures whether the CRC is generated and appended
to the frame (default) or not (selected in EXMR.XCRC).
Furthermore, the host selects the interframe time fill signal which is transmitted between
HDLC frames (EXMR:ITF). One option is to send continuous flags (’01111110’) or an
idle sequence (continuous ’1’s are transmitted), which is used if D-channel access
handling (collision resolution on the S bus) is required for example. Reprogramming of
ITF takes effect only after the transmission of the current frame has been completed or
after an XRES command.
Data Sheet
Transmit
Frame
32 Bytes
WR
XTF
XPR
32 Bytes
WR
32
IOM-2 Handler, TIC/CI Handler and HDLC Controller
XTF
XPR
CPU Interface
IOM Interface
76 Bytes
12 Bytes
309
WR
XTF+XME
32
12
XPR
PSB 21473
17-23
2003-03-31
fifoseq_tran.vsd
INCA-D