PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 349

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PSB21473FV13XT

Manufacturer Part Number
PSB21473FV13XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21473FV13XT

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / RoHS Status
Compliant
18
18.1
Figure 2
18.2
Burst Frame
Figure 18-1 demonstrates the general principles of the line interface communication
scheme. A frame transmitted by the exchange (LT) is received by the terminal equipment
(TE) after a line propagation delay. The terminal equipment waits the minimum guard
time (t
exchange will begin a transmission every 250 s (known as the burst repetition period).
Within a burst, the data rate is 384 kbit/s.
One frame contains the framing bit (F) and the user channels (2B + D). It can readily be
seen that in the 250- s burst repetition period, 4 D-bits, 16 B1-bits and 16 B2-bits are
transferred in each direction. This gives an effective full duplex data rate of 16 kbit/s for
the D-channel and 64 kbit/s for each B-channel.
AMI-coding is used for the line interface. Logical ‘0s’ correspond to a neutral level, logical
‘1s’ are coded as alternating positive and negative pulses (i.e. with a 100 % pulse width).
Data Sheet
TE
g
DASL
= 15.625 s) while the line clears. It then transmits a frame to the exchange. The
Line Transceiver
Wiring Configurations
Line Coding, Frame Structure of the DASL interfacee
Wiring Configurations forDASL Interface
TR
loop length
349
TR: Terminating Resistor
TR
DASL
LT-S
Point-to-Point
Configurations
Line Transceiver
macro_11
PSB 21473
2003-03-31
INCA-D

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