PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 323

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

RAC
The HDLC receiver is activated when this bit is set to ’1’. If it is ’0’ the HDLC data is not
evaluated in the receiver.
DIM2-0
These bits define the characteristics of the IOM Data Ports (DU, DD). The DIM0 bit
enables/disables the collission detection. The DIM1 bit enables/disables the TIC bus
access. The effect of the individual DIM bits is summarized in table 17-5.
Table 17-5
17.5.1.8 EXMR- Extended Mode Register
Value after reset: 00
EXMR
XFBS
0: Block size for the transmit FIFO data is16 byte
1: Block size for the transmit FIFO data is 8 byte
Note: A change of XFBS will take effect after a transmitter command (CMDR.XME,
Data Sheet
DIM2
0
0
0
0
1
CMDR.XRES, CMDR.XTF) has been written
DIM1
0
1
x
x
x
7
XFBS
IOM
DIM0
... Receiver Active
... Digital Interface Modes
… Transmit FIFO Block Size
0
1
x
x
x
®
-2 Terminal Modes
H
Characteristics
Transparent D-channel, the collission detection is disabled
Stop/go bit evaluated for D-channel access handling
Last octet of IOM channel 2 used for TIC bus access
TIC bus access is disabled
Reserved
RFBS
IOM-2 Handler, TIC/CI Handler and HDLC Controller
SRA XCRC RCRC
323
0
0
ITF
RD/WR (23
PSB 21473
2003-03-31
INCA-D
H
)