PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 411

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

INCA-D
PSB 21473
Digital Signal Processor
20.2.2
Parallel Interface to the DSP Domain PIDD
The parallel interface from the XBUS to the DSP domain (PIDD) is shown in figure 20-31.
DSP BUS
XBUS
PIDD
IF
PIDDIR
Figure 20-31 PIDD
The accesses to the DSP domain can be of the following types:
1. DSP Register Read,
2. DSP Register Write
3. Interrupt Acknowledge
The PIDD status register PIDDSTAT can be read at any time to determine, whether the
DSP is able to handle the next access to its domain.
However, if the DSP is in power down mode (i.e. PIDDHWCFG.PD=1), a read access to
the status register does not deliver valid data.
A “DSP Register Read” or “DSP Register Write” access can only be performed when the
DSP is ready (i.e. PIDDSTAT.RDY=1). In that case the access itself is executed when
the corresponding command is written into the command register PIDDCOM by the
controller.
For a write access ("DSP Write Register”), the data must be written to the data register
PIDDGPTD before the command register PIDDCOM is written. Upon this action, the
PIDDSTAT.RDY bit is cleared by hardware and is set as soon as the DSP is ready again.
Data Sheet
411
2003-03-31