PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 184

no-image

PSB21473FV13XT

Manufacturer Part Number
PSB21473FV13XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21473FV13XT

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / RoHS Status
Compliant
Data Sheet
Figure 13-1 Bootstrap Loader Sequence
After reset, the microcontroller expects the serial reception of a zero byte (8 data bits =
00
timer T6, which runs at maximum speed. The result T6 depends on the baud rate BR
and the CPU clock frequency f
Factor 9 results from zero byte duration including start bit, factor 4 from T6 prescaler.
Using T6, the bootstrap loader software calculates the optimum combination of
• FDV = value of the Fractional Divider Register S0FDV
• BG = Reload value for the Baud rate Timer / Reload Register S0BG
For this purpose, the software modifies FDV in a loop and calculates BG.
As described in Chapter 15, the baud rate is given by:
Thus, BG can be calculated from equation 1 and 2 in the following way:
CSP:IP
H
1)
2)
3)
4)
5)
6)
RSTIN
, one stop bit, no parity) from a host at pin RXD (P3.11). The time is measured by
P0L.4
RxD0
TxD0
BSL initialization time, > 2 s @ f
Zero byte (1 start bit, eight ‘0’ data bits, 1 stop bit), sent by host.
Identification byte, sent by INCA-D.
32 bytes of code / data, sent by host.
Caution: TxD0 is only driven a certain time after reception of the zero byte
Internal Boot ROM.
T6 = 9 * f
BR = FDV * f
BG = (T6 * FDV * 4) / (9*512*16) - 1 = (T6 * FDV - 18432) / 18432
CPU
1)
CPU
/ (4*BR)
6)
2)
/ (512*16*(BG+1))
CPU
CPU
5)
= 20 MHz.
Int. Boot ROM BSL-routine
.
3)
184
4)
.
The Bootstrap Loader
user software
32 bytes
PSB 21473
2003-03-31
INCA-D
(1)
(2)
(3)

Related parts for PSB21473FV13XT