PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 305

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

INCA-D
PSB 21473
IOM-2 Handler, TIC/CI Handler and HDLC Controller
17.3.5
Data Transmission
17.3.5.1 General Description
The 64-byte cyclic XFIFO buffer has variable FIFO block sizes (thresholds) of 16 or 32
bytes, selectable by the XFBS bit in the EXMR register.
There are three different interrupt indications in the ISTAH register concerned with the
transmission of data:
XPR (Transmit Pool Ready) interrupt, indicating that a data block of up to 16 or 32 byte
(block size selected via EXMR:XFBS) can be written to the XFIFO.
An XPR interrupt is generated either
after an XRES (Transmitter Reset) command (which is issued for example for frame
abort) or
when a data block from the XFIFO is transmitted and the corresponding FIFO space is
released to accept further data from the host.
XDU (Transmit Data Underrun) interrupt, indicating that the transmission of the current
frame has been aborted (seven consecutive ’1’s are transmitted) as the XFIFO holds no
further transmit data. This occurs if the host fails to respond to an XPR interrupt quickly
enough.
XMR (Transmit Message Repeat) interrupt, indicating that the transmission of the
complete last frame has to be repeated as the cts signal was set to “0” (stop) while the
first data bytes have already been overwritten with new data. So the XFIFO does not hold
the first data bytes of the frame. (The HDLC transmitter is stopped if cts=0).
The occurence of an XDU or XMR interrupt clears the XFIFO and an XPR interrupt is
issued together with an XDU or XMR interrupt, respectively. Data cannot be written to
the XFIFO as long as an XDU/XMR interrupt is pending.
Three different control commands are used for transmission of data:
XTF (Transmit Transparent Frame) command, telling the HDLC controller that up to 16
or 32 byte (according to selected block size) have been written to the XFIFO and should
be transmitted. A start flag is generated automatically.
XME (Transmit Message End) command, telling the HDLC controller that the last data
block written to the XFIFO completes the corresponding frame and should be
transmitted. This implies that according to the selected mode a frame end (CRC +
closing flag) is generated and appended to the frame.
XRES (Transmitter Reset) command, resetting the HDLC transmitter and clearing the
transmit FIFO of any data. After an XRES command the transmitter always sends an
abort sequence, i.e. this command can be used to abort a transmission. XRES does not
clear pending interrupt indications of the transmitter, but have to be be cleared by
reading these interrutps.
Data Sheet
305
2003-03-31