PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 306

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

Data Sheet
Optionally two additional status conditions can be read by the host:
XDOV (Transmit Data Overflow), indicating that the data block size has been exceeded,
i.e. more than 16 or 32 byte were entered and data was overwritten.
XFW (Transmit FIFO Write Enable), indicating that data can be written to the XFIFO.
This status flag may be polled instead of or in addition to XPR.
The significant interrupts and commands are underlined as only these are usually used
during a normal transmission sequence.
The XFIFO requests service from the microcontroller by setting a bit in the ISTAH
register, which causes an interrupt (XPR, XDU, XMR). The microcontroller can then read
the status register STAR (XFW, XDOV), write data in the FIFO and it may optionally
change the transmit FIFO block size (EXMR.XFBS) if required.
The instant of the initiation of a transmit pool ready (XPR) interrupt after different transmit
control commands is listed in table 17-4.
Table 17-4
When setting XME the transmitter appends the CRC and the endflag at the end of the
frame. When XTF & XME has been set, the XFIFO is locked until successful
transmission of the current frame, so a consecutive XPR interrupt also indicates
successful transmission of the frame whereas after XME or XTF the XPR interrupt is
asserted as soon as there is space for one data block in the XFIFO.
The transfer block size is 32 bytes by default, but sometimes, if the microcontroller has
a high computational load, it is useful to increase the maximum reaction time for an XPR
interrupt. The maximum reaction time is:
t
As an example with a 64 byte FIFO, a selected block size of 16 bytes means that an XPR
interrupt is indicated when there are still 48 bytes (64 bytes - 16 bytes) to be transmitted.
With a 32 bytes block size the XPR is initiated when there are still 32 bytes (64 bytes -
max
32 bytes), i.e. the maximum reaction time for the smaller block size is 50 % higher with
CMDR.
XTF
XTF &
XME
XME
= (XFIFO size - XFBS) / data transmission rate
Commands
Transmit pool ready (XPR) interrupt initiated...
as soon as the selected buffer size in the FIFO is available.
after the successful transmission of the closing flag. The
transmitter sends always an abort sequence.
as soon as the selected buffer size in the FIFO is available, two
consecutive frames share flags (endflag = startflag of next frame).
XPR Interrupt (availability of the XFIFO) after XTF, XME
IOM-2 Handler, TIC/CI Handler and HDLC Controller
306
PSB 21473
2003-03-31
INCA-D