PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 172

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

INCA-D
PSB 21473
The External Bus Interface
1) The data drivers from the previous bus cycle should be disabled when the RD signal becomes active.
Figure 11-9 Read/Write Delay
The read/write delay is controlled via the RWDCx bits in the BUSCON registers. The
command(s) will be delayed, if bit RWDCx is ‘0’ (default after reset).
11.3
Controlling the External Bus Controller
A set of registers controls the functions of the EBC. General features like the usage of
interface pins (WR, BHE) and segmentation are controlled via register SYSCON. The
properties of a bus cycle like chip select mode, length of ALE, external bus mode, read/
write delay and waitstates are controlled via registers BUSCON4...BUSCON0. Four of
these
registers
(BUSCON4...BUSCON1)
have
an
address
select
register
(ADDRSEL4...ADDRSEL1) associated with them, which allows to specify up to four
address areas and the individual bus characteristics within these areas. All accesses
that are not covered by these four areas are then controlled via BUSCON0.
Data Sheet
172
2003-03-31