PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 601

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

that must be selected earlier, because they are used for the first access of the program
execution.
These selections are made during reset via the pins of PORT0, which are read at the
end of the internal reset sequence. During reset internal pullup or pulldown devices are
active on the PORT0 lines, so their input level is high or low, respectively. With the
coding of the selections, as shown below, in many cases the default option, ie. high level,
can be used.
The system startup configuration is sampled and latched with a specific reset signal
provided by the Reset Control Block of the INCA-D. For latching of the high byte of port
P0 configuration the register RP0H is used.
The RP0H register is defined as follows:
RP0H
Bit
R
WRCFC
CSSEL
SALSEL
For latching of P0 startup configuration (from XBUS) the following reset types - see
description of Reset Control Block - are differentiated:
• Power-on reset (PONR) or long (warm) HW reset (LHWR)
• Short (warm) HW reset (SHWR)
• SW reset (SWR) or watchdog timer reset (WDTR)
The following table shows latching of system startup configuration in dependence of the
reset type and of the bidirectional reset function.
Data Sheet
15
-
-
14
-
-
(F108
13
-
-
H
Function
reserved
Write Configuration Control (also indicated in SYSCON register)
‘0’: Standard function of pins WR and BHE
‘1’: Pin WR acts as WRL, pin BHE acts as WRH
Chip Select Lines Selection
Number of active CS outputs.
Description of possible selections: see table below (Startup Configuration)
Segment Address Lines Selection
Number of active segment address outputs.
Description of possible selections: see table below (Startup Configuration)
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12
-
H
-
)ESFR-bReset Value: --XX
11
-
-
10
-
-
9
-
-
8
-
-
601
H
7
-
-
!
Latching of Startup Configuration
6
-
-
R
5
r
SALSEL
4
r
3
r
2
CSSEL
System Reset
r
PSB 21473
2003-03-31
1
r
INCA-D
WRC
FC
0
r