MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 927

IC MPU QUICC 25MHZ 240-FQFP

MC68EN360CAI25L

Manufacturer Part Number
MC68EN360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor
Series
MC68000r

Specifications of MC68EN360CAI25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Core Size
32 Bit
Cpu Speed
25MHz
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
No. Of Pins
240
Supply Voltage Range
4.75V To 5.25V
Rohs Compliant
Yes
Family Name
M68xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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Company
Part Number
Manufacturer
Quantity
Price
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MC68EN360CAI25L
Manufacturer:
APLHA
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Part Number:
MC68EN360CAI25L
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68EN360CAI25L
Manufacturer:
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RISC Microcode from RAM
C.3.2 Performance
At 25 Mhz, an aggregate ATOM1 bandwidth of 10 Mbps divided among the 4 SCCs con-
sumes 100% of the processing power of the RISC communications engine. If only a percent-
age of the total available ATOM1 bandwidth is used, the remaining RISC processing power
can be used to run other protocols on other channels. Table C-3 shows the possible QUICC
configuration.
C-5
• Empty cells transmitted when there are no pending data transfers.
• Empty cells and cells with non-matching headers are automatically discarded on re-
• Scrambling option is provided utilizing the self-synchronizing X
• Incoming cells with incorrect HECs are received and marked.
• Bandwidth reservation mechanism in the transmitter to allow mixing of data and isoch-
• CAM support on reception for handling many connections.
ceive.
nomial.
ronous services.
—Consumes 1280 bytes of the QUICC’s internal memory.
E1 ATM
E1 ATM
UART
Frame
Relay
RS-232 Driver
E1 ATM Line
E1 ATM Line
Frame Relay
Transceiver
Transceiver
System
Driver
Figure C-2. ATM/Frame Relay Interwork System
Freescale Semiconductor, Inc.
For More Information On This Product,
Interface
System
MC68360
QUICC
MC68360 USER’S MANUAL
CPM
Go to: www.freescale.com
SMC1
SMC2
SCC1
SCC2
SCC3
SCC4
SPI
8-bit Boot ROM
Dual Port RAM
14 SDMAs
Controller
RISC CP
2 IDMAs
Interrupt
4Timers
32-bit SRAM
43
CPU32+ Core
Chip Selects
+ 1 scrambling poly-
Protection
Generator
Generator
DRAMC
Periodic
SRAMC
System
Clock
Clock
32-bit DRAM
SIM

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