MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 215

IC MPU QUICC 25MHZ 240-FQFP

MC68EN360CAI25L

Manufacturer Part Number
MC68EN360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor
Series
MC68000r

Specifications of MC68EN360CAI25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Core Size
32 Bit
Cpu Speed
25MHz
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
No. Of Pins
240
Supply Voltage Range
4.75V To 5.25V
Rohs Compliant
Yes
Family Name
M68xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68EN360CAI25L
Manufacturer:
APLHA
Quantity:
12 000
Part Number:
MC68EN360CAI25L
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68EN360CAI25L
Manufacturer:
FREESCALE
Quantity:
20 000
Command Sequence:
Operand Data:
Result Data:
Register Field:
5.6.2.8.8 Read Memory Location (READ). Read the sized data at the memory location
specified by the long-word address. Only absolute addressing is supported. The SFC regis-
ter determines the address space accessed. Valid data sizes include byte, word, or long
word.
Command Format:
Command Sequence:
Operand Data:
The data to be written into the register is always supplied as a 32-bit long word. If the reg-
ister is less than 32 bits, the least significant word is used.
“Command complete” status is returned when register write is complete.
The system control register is specified by the register field (see Table 5-24). The FAR is
a read-only register—any write to it is ignored.
15
The single operand is the long-word address of the requested memory location.
0
READ (LONG)
READ (B/W)
14
0
???
???
13
0
12
1
"NOT READY"
WSREG
"NOT READY"
"ILLEGAL"
???
MS ADDR
"ILLEGAL"
MS ADDR
XXX
Freescale Semiconductor, Inc.
XXX
11
1
For More Information On This Product,
10
0
MC68360 USER’S MANUAL
Go to: www.freescale.com
"NOT READY"
"NOT READY"
"NOT READY"
"NOT READY"
MS DATA
"NOT READY"
NEXT CMD
"ILLEGAL"
LS ADDR
NEXT CMD
LS ADDR
9
0
XXX
8
1
"NOT READY"
"NOT READY"
LOCATION
7
MEMORY
LOCATION
NEXT CMD
OP SIZE
MEMORY
LS DATA
READ
READ
6
5
0
"CMD COMPLETE"
NEXT CMD
"NOT READY"
"NOT READY"
4
0
MS RESULT
BERR/AERR
NEXT CMD
BERR/AERR
RESULT
XXX
XXX
XXX
XXX
XXX
3
0
2
0
"NOT READY"
"NOT READY"
NEXT CMD
LS RESULT
NEXT CMD
NEXT CMD
1
0
CPU32+
0
0

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