MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 233

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

5.7.2.2 CALCULATE EFFECTIVE ADDRESS. The calculate EA table indicates the num-
ber of clock periods needed for the processor to calculate a specified EA. The timing is
equivalent to fetch EA except there is no read cycle. The tail and cycle time are reduced by
the amount of time the read would occupy. The total number of clock cycles is outside the
parentheses. The numbers inside parentheses (r/p/w) are included in the total clock cycle
number. All timing data assumes two-clock reads and writes.
Dn
An
(An)
(An)
(d
(xxx).W
(xxx).L
(d
(0) (All Suppressed)
(d
(d
(An)
(Xm.Sz Sc)
(An,Xm.Sz Sc)
(d
(d
(d
(d
(d
(d
NOTES:
1. Replacement fetches overlap the head of the operation by the amount specified in the tail.
2. Size and scale of the index register do not affect execution time.
3. The PC may be substituted for the base address register An.
4. When adjusting the prefetch time for slower buses, extra clocks may be subtracted from the head
5. Timing is calculated with the CPU32+ in 16-bit mode
(An)
16
8
16
32
16
32
16
32
16
32
,An,Xn.Sz Sc) or (d
,An) or (d
)
)
,An) or (d
,An) or (d
,An,Xm) or (d
,An,Xm) or (d
,An,Xm.Sz Sc) or (d
,An,Xm.Sz Sc) or (d
until the head reaches zero, at which time additional clocks must be added to both the tail and cycle
counts.
16
16
32
,PC)
,PC)
,PC)
16
32
,PC,Xm)
,PC,Xm)
Instruction
Freescale Semiconductor, Inc.
8
For More Information On This Product,
,PC,Xn.Sz Sc)
16
32
,PC,Xm.Sz Sc)
,PC,Xm.Sz Sc)
MC68360 USER’S MANUAL
Go to: www.freescale.com
Head
–
–
1
1
2
1
1
1
4
2
1
1
1
4
4
1
1
2
1
2
1
Tail
–
–
0
0
0
1
1
3
0
0
1
3
0
0
0
1
3
0
1
0
1
0(0/0/0)
0(0/0/0)
2(0/0/0)
2(0/0/0)
2(0/0/0)
3(0/1/0)
3(0/1/0)
5(0/2/0)
6(0/1/0)
4(0/1/0)
5(0/2/0)
7(0/3/0)
4(0/1/0)
6(0/1/0)
6(0/1/0)
5(0/2/0)
7(0/3/0)
6(0/2/0)
7(0/3/0)
6(0/2/0)
7(0/3/0)
Cycles
1,2,3,4
Notes
2,3,4
1,3,4
1,3,4
1,3,4
2,3,4
1,3
1,4
1,4
2,4
2,4
3,4
–
–
–
–
–
1
1
4
4
CPU32+