MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 677

IC MPU QUICC 25MHZ 240-FQFP

MC68EN360CAI25L

Manufacturer Part Number
MC68EN360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor
Series
MC68000r

Specifications of MC68EN360CAI25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Core Size
32 Bit
Cpu Speed
25MHz
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
No. Of Pins
240
Supply Voltage Range
4.75V To 5.25V
Rohs Compliant
Yes
Family Name
M68xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68EN360CAI25L
Manufacturer:
APLHA
Quantity:
12 000
Part Number:
MC68EN360CAI25L
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68EN360CAI25L
Manufacturer:
FREESCALE
Quantity:
20 000
CHARACTER1-8—Control Character Values
E—End of Table
R—Reject character
RCCM—Received Control Character Mask
These fields define control characters that should be compared to the incoming character.
For less than 8 bits characters, the msb bits should be zero.
The value in this register is used to mask the comparison of CHARACTER1 through
CHARACTER8. The lower eight bits of RCCM correspond to the lower eight bits of
CHARACTER1-8, and are decoded as follows.
OFFSET + 10
OFFSET +1 2
OFFSET + E
OFFSET + 0
OFFSET + 2
OFFSET + 4
OFFSET + 6
0 = This entry is valid. The lower 8 bits will be checked against the incoming character.
1 = The entry is not valid. This must be the last entry in the Control Characters Table.
0 = The character is not rejected but written into the receive buffer. The buffer is then
1 = If this character is recognized it will not be written to the receive buffer. Instead, it
0 = Mask this bit in the comparison of the incoming character, and CHARACTER1
1 = The address comparison on this bit proceeds normally. No masking takes place.
closed and a new receive buffer is used if there is more data in the message. A
maskable (I Bit in the Receive BD) interrupt is generated.
is written to the Received Control Characters Register (RCCR) and a maskable in-
terrupt is generated. The current buffer is not closed when a control character is
received with R set.
through CHARACTER8.
15
E
E
E
E
1
In tables with 8 control characters this bit is always 0.
The two most significant bits (bit 15 and bit 14) of RCCM must
be set, or erratic operation may occur during the control charac-
ter recognition process.
14
R
R
R
R
1
13
Freescale Semiconductor, Inc.
For More Information On This Product,
12
11
MC68360 USER’S MANUAL
Go to: www.freescale.com
10
NOTE
NOTE
9
8
7
6
5
CHARACTER1
CHARACTER2
CHARACTER3
CHARACTER8
Parallel Interface Port (PIP)
4
RCCM
RCCR
3
2
1
0

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