MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 915

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

The LAPD module features are as follows:
The LAPB module features are as follows:
• Provides timer services
• Can be configured to send trace messages to a system log file
• Supports up to 24 serial ports
• Fully implements 1988 CCITT Recommendation Q.920/Q.921
• Supports up to 12 physical channels (8192 logical links per channel)
• Supports management and broadcast links
• Supports user and network applications
• Uses dedicated transmit pool for fast control frame generation
• Dynamic modification of protocol parameters
• Independent of layer 1 and layer 3 implementation
• Independent of layer 2 management
• Message-oriented interface
• Independent configuration of upper and lower layer modules interfacing with each
• Special mode for internal loopback between pairs of links
• Supports external loopback between two QUICC serial channels or on the same serial
• Trace option for reporting to system management each primitive issued by the LAPD
• Fully implements 1988 CCITT Recommendation X.25, chapters 2.1–2.4
• Supports up to 12 distinct physical channels with each operating as an independent sta-
• Modulo 8 or 128 operation
• Applicable for DTE and DCE applications
• Uses dedicated transmit pool for fast control frame generation
• Dynamic modification of protocol parameters
• Independent of layer 1 and layer 3 implementation
• Message-oriented interface
• Independent configuration of upper and lower layer modules interfacing with each
• Special mode for internal loopback (frames are not sent to the driver)
— Supports linked lists of frames for both transmit and receive
— Provides error handling and recovery for both transmit and receive
— Supports all serial ports in different protocol configurations
— Provides internal loopback (frames not sent to QUICC)
LAPD link
channel
module to the layer 3 or layer 2 management
tion
LAPB link
Freescale Semiconductor, Inc.
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