MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 248

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

System Integration Module (SIM60)
Bus Monitor
On the MC68302, this function is called the hardware watchdog.
Double Bus Fault Monitor
6-4
The SIM60 provides a bus monitor to monitor the data and size acknowledge (DSACK)
response time for all bus accesses (internal-to-internal, internal-to-external, external-to-
internal, and external-to-external). Four selectable response times allow for variations in
response speed of memory and peripherals used in the system. A bus error signal is as-
serted if the DSACK response limit is exceeded. This function can be disabled.
The double bus fault monitor causes a reset to occur if the internal HALT signal is assert-
ed by the CPU32+, indicating a double bus fault. A double bus fault results when a bus or
address error occurs during the exception processing sequence for a previous bus or ad-
dress error, a reset, or while the CPU32+ is loading information from a bus error stack
frame during an RTE instruction. This function can be disabled. See Section 4 Bus Oper-
ation for more information.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 6-1. QUICC Memory Map
REGISTERS
INTERNAL
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE
REGB (REGISTER BASE) = DPRBASE + 4K
DPRBASE (DUAL-PORT RAM BASE)
DUAL-PORT RAM
MBAR (SIM60)