MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 823

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

10.9 BUS OPERATION AC TIMING SPECIFICATIONS (CONTINUED)
Num.
48 5,7 DSACK¯ Asserted to BERR , HALT Asserted
56A
58A
62 9
63 9
64 9
65 9
49
53
54
55
56
57
58
60
61
66
70
71
72
73
74
75
76
77
80
81
82
83
84
85
86
87
RESET Pulse Width (Input from External Device)
CLKO1 Low to RESETS Driven Low (upon Reset Instruction
execution only)
BR low to CLKO1 Rising Edge (040 comp. mode)
RESETH Low to Config2–0, MOD1–0, B16M valid
CLKO1 high to BERR, RESETS, RESETH output Low
Data-Out, Parity-Out Hold from CLKO1 High
CLKO1 High to Data-Out, Parity-Out High Impedance
R/W Asserted to Data Bus Impedance Change
RESET Pulse Width (Reset Instruction)
BERR Negated to HALT Negated (Rerun)
CLKO1 High to BERR, RESETS, RESETH Driven Low
CLKO1 High to BCLRO Asserted
CLKO1 High to BCLRO Negated
BR Synchronous Setup Time
BR Synchronous Hold Time
BGACK Synchronous Setup Time
BGACK Synchronous Hold Time
CLKO1 Low to Data Bus Driven (Show Cycle)
Data Setup Time to CLKO1 Low (Show Cycle)
Data Hold from CLKO1 Low (Show Cycle)
BKPT Input Setup Time
BKPT Input Hold Time
Config2–0
MOD1–0 Hold Time, B16M Hold Time
DSI Input Setup Time
DSI Input Hold Time
DSCLK Setup Time
DSCLK Hold Time
DSO Delay Time
DSCLK Cycle
CLKO1 High to Freeze Asserted
CLKO1 High to Freeze Negated
Characteristic
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
t DSCCYC
t CHBCN
t CHBRL
t CHBCA
t SCLDD
t SCLDH
t DSCSU
Symbol
t SCLDS
t HRPW
t DSISU
t CHRO
t DOCH
t CHDH
t RADC
t BNHN
t BGSU
t DSCH
t DSOD
t DABA
t BRSU
t
t RPWI
t CLRL
t BKST
t BKHT
t FRZA
t FRZN
BRCH
t DSIH
t BGH
t MSH
t MSH
t BRH
t MST
3.3 V/5.0 V
Min
512
25.0 MHz
25
20
10
10
10
10
10
10
10
—
—
—
—
—
—
—
—
—
0
0
5
5
5
0
6
6
0
6
6
2
0
0
t cyc +
Max
500
30
20
30
30
20
20
30
35
35
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
20
—
Electrical Characteristics
3.75
3.75
3.75
3.75
3.75
3.75
Min
512
7.5
7.5
7.5
7.5
7.5
7.5
19
20
10
—
—
—
—
—
—
—
33.34MHz
0
0
5
0
0
2
0
0
5.0V
tcyc+ 20
26.25
26.25
Max
22.5
22.5
500
15
26
26
15
15
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
CLKO1
CLKO1
CLKO1
CLKO1
CLKO1
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns