MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 450

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Serial Communication Controllers (SCCs)
Bits 7–5—Reserved
MOT—Motorola
FC3–FC0—Function Code 3–0
Transmit Function Code Register
Bits 7–5—Reserved
MOT—Motorola
7-126
This bit should be set by the user to achieve normal operation. If this bit is modified on the
fly, it will take effect at the beginning of the next frame (Ethernet, HDLC, and transparent)
or at the beginning of the next BD otherwise. MOT must be set if the data buffer is located
in external memory and has a 16-bit wide port size.
These bits contain the function code value used during this SDMA channel’s memory ac-
cesses. It is suggested that the user write bit FC3 with a one, to identify this SDMA chan-
nel access as a DMA-type access. Example: FC3–FC0 = 1000 (binary). Do not write the
value 0111 (binary) to these bits.
This bit should be set by the user to achieve normal operation. If this bit is modified on the
fly, it will take effect at the beginning of the next frame (Ethernet, HDLC, and transparent)
or at the beginning of the next BD otherwise. The MOT must be set if the data buffer is
located in external memory and has a 16-bit wide port size.
0 = Intel convention is used for byte ordering—swapped operation. It is also called lit-
1 = Motorola byte ordering—normal operation. It is also called big-endian byte order-
0 = Intel convention is used for byte ordering—swapped operation. It is also called lit-
1 = Motorola byte ordering—normal operation. It is also called big-endian byte order-
tle-endian byte ordering. The bytes stored in each buffer word are reversed as
compared to the Motorola mode.
ing. As data is received from the serial line and put into the buffer, the most signif-
icant byte of the buffer word contains data received earlier than the least significant
byte of the same buffer word.
tle-endian byte ordering. The transmission order of bytes within a buffer word is re-
versed as compared to the Motorola mode.
ing. As data is transmitted onto the serial line from the data buffer, the most signif-
icant byte of the buffer word contains data to be transmitted earlier than the least
significant byte of the same buffer word.
The MOT must be set if the data buffer is located in external
memory and has a 16-bit wide port size.
Freescale Semiconductor, Inc.
7
For More Information On This Product,
—
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MC68360 USER’S MANUAL
Go to: www.freescale.com
5
MOT
NOTE
4
3
2
FC3–FC0
1
0