MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 396

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Serial Interface with Time Slot Assigner
7.8.4.5 PROGRAMMING SI RAM ENTRIES. The programming of each word within the
RAM determines the routing of the serial bits (or bit groups) and the assertion of strobe out-
puts. The RAM programming codes are as follows:
Bit 15 LOOP (Loop back this time slot)
SWTR—Switch Tx and Rx
7-72
LOOP
15
The SWTR bit is only valid in the receive route RAM and is ignored in the transmit route
RAM. This bit affects the operation of both the L1RXD and L1TXD pins
The SWTR bit would only be set in a special situation where the user desires to receive
data from a transmit pin and transmit data on a receive pin. For instance, consider the sit-
uation where devices A and B are connected to the same TDM, each with different time
slots. Normally, there is no opportunity for stations A and B to communicate with each oth-
er directly over the TDM, since they both receive the same TDM receive data and transmit
on the same TDM transmit signal (see Figure 7-27).
NOTES:
1: Only available on REV C mask or later. NOT Available on REV A or B.
Rev A mask is C63T
Rev B mask are C69T, and F35G
Current Rev C mask are E63C, E68C and F15W
1
0 = normal mode
1 = loop back mode for this time slot
SI RAM ADDRESS: 0
SWTR
14
(16-BITS WIDE)
13
128
158
30
SSEL1–SSEL4
12
Figure 7-26. Two TDMs with Dynamic Frames
16 ENTRIES
16 ENTRIES
16 ENTRIES
16 ENTRIES
ROUTE
ROUTE
ROUTE
ROUTE
RXa
RXa
TXa
TXa
11
Freescale Semiconductor, Inc.
For More Information On This Product,
10
MC68360 USER’S MANUAL
160
32
62
Go to: www.freescale.com
TWO CHANNELS WITH SHADOW RAM
190
—
FOR DYNAMIC ROUTE CHANGE
9
L1RCLKa
FRAMING SIGNALS
L1RSYNCa
L1TCLKa
L1TSYNCa
8
RDM = 11
CSEL
7
222
192
64
94
6
16 ENTRIES
16 ENTRIES
16 ENTRIES
16 ENTRIES
ROUTE
ROUTE
ROUTE
ROUTE
TXb
TXb
RXb
RXb
5
4
CNT
126
224
96
254
3
FRAMING SIGNALS
L1RCLKb
L1RSYNCb
L1TCLKb
L1TSYNCb
2
BYT
1
LST
0