MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 464

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Serial Communication Controllers (SCCs)
states that dynamic changes are allowed, the following sequences are not required, and the
register or bit may be changed immediately. In all other cases, the sequence should be
used. For instance, the internal baud rate generators allow on-the-fly changes, but the
DPLL-related bits in the GSMR do not.
7.10.14.1 SCC TRANSMITTER FULL SEQUENCE. •For the SCC transmitter, the full dis-
7.10.14.2 SCC TRANSMITTER SHORTCUT SEQUENCE. •A shorter sequence is possible
7.10.14.3 SCC RECEIVER FULL SEQUENCE. •The full disable and enable sequence for
7-140
1. STOP TRANSMIT command. This command is recommended if the SCC is currently
2. Clear the ENT bit in the GSMR, which disables the SCC transmitter and puts it in a
3. Make modifications. The user may make modifications to the SCC transmit parame-
4. RESTART TRANSMIT command. This command is required if the INIT TX PARAME-
5. Set the ENT bit in the GSMR. Transmission will now begin using the Tx BD pointed to
1. Clear the ENT bit in the GSMR.
2. INIT TX PARAMETERS command. Any additional modifications may now be made.
3. Set the ENT bit in the GSMR.
1. Clear the ENR bit in the GSMR. Reception will be aborted immediately. This disables
2. Make modifications. The user may make modifications to the SCC receive parameters
able and enable sequence is as follows:
if the user desires to reinitialize the transmit parameters to the state they had after reset.
This sequence is as follows:
the receiver is as follows:
in the process of transmitting data since it stops transmission in an orderly way. If the
SCC is not transmitting (e.g., no Tx BDs are ready or the GRACEFUL STOP TRANS-
MIT command has been issued and has completed), then the STOP TRANSMIT com-
mand is not required. Furthermore, if the TBPTR will be overwritten by the user or the
INIT TX PARAMETERS command will be executed, this command is not required.
reset state.
ters including the parameter RAM. If the user desires to switch protocols or restore the
SCC transmit parameters to their initial state, the INIT TX PARAMETERS command
may now be issued.
TERS command was not issued in step 3.
by the TBPTR as soon as the Tx BD R-bit is set.
the receiver of the SCC and puts it in a reset state.
The modification of parameter RAM does not require a full dis-
abling of the SCC. See the parameter RAM description for de-
tails on when parameter RAM values may be modified.
If the user desires to disable all SCCs, SMCs, and the SPI, then
the CR may be used to reset the entire CP with a single com-
mand.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE