MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet - Page 524

• Manufacturer Part Number: MC68EN360CAI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MC68000r

Specifications of MC68EN360CAI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Core Size: 32 Bit
• Cpu Speed: 25MHz
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: FQFP
• No. Of Pins: 240
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Serial Communication Controllers (SCCs)
7.10.19.4.2 PSMR Programming. The PSMR programming sequence is as follows:
7.10.19.4.3 TODR Programming. To expedite a transmit frame, the transmit on demand
register (TODR) may be used.
7.10.19.4.4 AppleTalk Controller Example. Except for the previously discussed register
programming, the HDLC Example #1 may be followed.
7.10.20 BISYNC Controller
The byte-oriented binary synchronous communication (BISYNC) protocol was originated by
IBM for use in networking products. The three classes of BISYNC frames are transparent,
non-transparent with header, and non-transparent without header (see Figure 7-63). The
transparent mode in BISYNC allows full binary data to be transmitted with any possible char-
acter pattern. Each class of frame starts with a standard two-octet synchronization pattern
and ends with a block check code (BCC). The end of text character (ETX) is used to sepa-
rate the text and BCC fields.
The bulk of the frame is divided into fields whose meaning depends on the frame type. The
BCC is a 16-bit CRC (CRC16) format if 8-bit characters are used; it is a longitudinal check
(a sum check) in combination with vertical redundancy check (parity) if 7-bit characters are
used. In transparent operation, to allow the BISYNC control characters to be present in the
frame as valid text data, a special character (DLE) is defined, which informs the receiver that
the character following the DLE is a text character, not a control character. If a DLE is trans-
mitted as valid data, it must be preceded by a DLE character. This technique is sometimes
called byte-stuffing.
7-200
1. The NOF bits should be set to 0001 (binary) giving two flags before frames (one open-
2. The CRC should be set to 16-bit CRC-CCITT.
3. The DRT bit should be set.
4. All other bits should be set to zero or to their default condition.
SYN1
SYN1
SYN1
ing flag, plus one additional flag).
The transparent frame type in BISYNC is not related to the total-
ly transparent protocol supported by the QUICC. See 7.10.21
Transparent Controller for details.
SYN2
SYN2
SYN2
Freescale Semiconductor, Inc.
Figure 7-63. Typical BISYNC Frames
SOH
STX
DLE
For More Information On This Product,
MC68360 USER’S MANUAL
NON-TRANSPARENT WITHOUT HEADER
NON-TRANSPARENT WITH HEADER
Go to: www.freescale.com
HEADER
STX
TRANSPARENT
NOTE
TRANSPARENT TEXT
TEXT
STX
TEXT
DLE
ETX
ETX
ETX
BCC
BCC
BCC