TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 80

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

P6FC
(001BH)
P6
(0018H)
P6CR
(001AH)
P6DR
(0086H)
Bit symbol
Read/Write
Reset State
Bit symbol
Read/Write
Reset State
Function
Bit symbol
Read/Write
Reset State
Note 2
Function
Bit symbol
Read/Write
Reset State
Function
Note 1: Read-modify-write is prohibited for P6CR and P6FC.
Note 2: It is set to “Port” or “Address bus” by AM pin setting.
P67C
P67F
P67D
P67
0/1
7
7
7
7
0
1
P66C
P66D
P66F
P66
0/1
6
6
6
6
0
1
Figure 3.5.12 Register for Port 6
Data from external port (Output latch register is cleared to “0”)
Port 6 Function register
Port 6 Control register
Input/Output buffer drive register for standby mode
Port 6 Drive register
P65C
P65D
P65F
P65
0/1
5
5
0
5
5
1
Port 6 register
92CH21-78
0: Port 1: Address bus (A16 to A23)
P64C
P64F
P64D
0: Input 1: Output
P64
0/1
4
4
4
4
0
1
R/W
W
W
W
P63C
P63D
P63F
P63
0/1
3
3
3
3
0
1
P62C
P62D
P62F
P62
0/1
2
2
2
0
1
2
P61C
P61D
P61F
P61
0/1
1
1
1
1
0
1
TMP92CH21
2009-06-19
P60C
P60D
P60F
P60
0/1
0
0
0
0
1
0