TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 162

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

SCLK1
SCLK1
RXD1
φT0
f
IO
SC0MOD0
<RXE>
φT0
φT2
φT8
φT32
RXDCLK
Serial clock generation circuit
I/O interface mode
RB8
BR1CR<BR1CK1:0>
2
Receive buffer 1 (Shift register)
φT2
Receive counter
(UART only ÷ 16)
4 8 16 32
Prescaler
Receive buffer 2 (SC1BUF)
Receive
control
Baud rate generator
φT8
<BR1S3:0>
BR1CR
Figure 3.9.3 Block Diagram of Serial Channel 1
φT32
<BR1ADDE>
64
BR1CR
SC1MOD0
<WU>
<BR1K3:0>
BR1ADD
<OERR> <PERR> <FERR>
÷2
<PE>
92CH21-160
interrupt control
Serial channel
Internal data bus
Parity control
Error flag
TA0TRG
(from TMRA0)
SC1CR
SC1CR
SC1MOD0
<SC1:0>
SC1CR
<IOC>
<EVEN>
I/O interface mode
UART
mode
SC1MOD0
<SM1:0>
TXDCLK
TB8
(UART only ÷ 16)
Transmission
Transmision
SIOCLK
counter
control
Transmission buffer
(SC1BUF)
SC1MOD0
<CTSE>
TMP92CH21
2009-06-19
INT request
INTRX1
INTTX1
CTS1
TXD1