TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 310

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

ADREG2L
(12A4H)
ADREG2H
(12A5H)
ADREG3L
(12A6H)
ADREG3H
(12A7H)
Bit symbol
Read/Write
Reset State
Function
Bit symbol
Read/Write
Reset State
Function
Bit symbol
Read/Write
Reset State
Function
Bit symbol
Read/Write
Reset State
Function
Channel x
conversion result
AD conversion result.
AD conversion result.
ADR21
Stores lower 2 bits of
ADR29
ADR31
Stores lower 2 bits of
ADR39
7
7
7
7
Undefined
Undefined
R
R
Figure 3.11.5 AD Converter Related Registers
ADREGxH
7
ADR20
ADR28
ADR30
ADR38
AD Conversion Result Register 2 High
AD Conversion Result Register 3 High
AD Conversion Result Register 2 Low
AD Conversion Result Register 3 Low
6
6
6
6
9
6
8
5
7
ADR27
ADR37
4
Stores upper 8 bits of AD conversion result.
Stores upper 8 bits of AD conversion result.
92CH21-308
5
5
5
5
6
3
5
2
ADR26
ADR36
4
1
• Bits 5 to 1 are always read as 1.
• Bit0 is the AD conversion data storage flag <ADRxRF>.
4
4
4
4
When the AD conversion result is stored, the flag is set to
1. When either of the registers (ADREGxH, ADREGxL) is
read, the flag is cleared to 0.
3
Undefined
Undefined
0
R
R
2
ADR25
ADR35
1
7
3
3
3
3
0
6
5
ADR24
ADR34
4
2
2
2
2
3
2
ADR23
ADR33
ADREGxL
1
1
1
1
1
TMP92CH21
0
2009-06-19
AD conversion
data storage flag
1: Conversion
AD conversion
data storage flag
1: Conversion
result stored
ADR2RF
ADR3RF
result stored
ADR22
ADR32
0
R
0
0
R
0
0
0