TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 531

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

Set Descriptor
USBREADY
USBINTFR1
USBINTFR2
USBINTFR3
USBINTFR4
Symbol
Port Status
FRAME_H
ADDRESS
FRAME_L
STALL
(12) USB controller (5/6)
register H
register 1
register 2
register 3
register 4
Descriptor
Address
interrupt
interrupt
interrupt
interrupt
Name Address
register
register
register
register
Frame
Frame
register
status
ready
USB
USB
USB
USB
USB
Port
Low
Set-
stall
flag
flag
flag
flag
07E0H
07E1H
07E2H
07E3H
07E6H
07E8H
07F0H
07F1H
07F2H
07F3H
When read
When write 0: Clear flag
INT_URST_STR
EP1_FULL_A
EP3_FULL_A
Reserved7
INT_SETUP
When read 0: Not generate interrupt
T[10]
7
0
−
0
0
0
0
0
0
0:Not generate
1:Generate
1: −
R/W
INT_URST_END
EP1_Empty_A
EP3_Empty_A
1: Generate interrupt
Reserved6
interrupt
interrupt
When read 0: Not generate interrupt
INT_EP0
When read 0: Not generate interrupt
T[6]
T[9]
A6
6
0
0
0
0
0
0
0
0
92CH21-529
R
EP1_FULL_B
1: Generate interrupt
PaperError
1: Generate interrupt
INT_STAS
INT_SUS
T[5]
T[8]
A5
5
0
0
0
0
0
0
0
R/W
When write
INT_RESUME
EP1_Empty_B
INT_STASN
Select
T[4]
T[7]
A4
4
1
0
0
0
0
0
0
R/W
R/W
W
R
1: −
0: Clear flag
When write 0: Clear flag
INT_CLKSTOP
EP2_FULL_A
When write
INT_EP1N
NotError
R
T[3]
A3
3
1
0
0
0
0
0
1: −
EP2_Empty_A EP2_FULL_B
Reserved2
INT_CLKON
INT_EP2N
0: Clear flag
CREATE
1: −
T[2]
A2
2
0
0
0
0
0
0
0
TMP92CH21
FRAME_STS1 FRAME_STS0
Reserved1
2009-06-19
INT_EP3N
T[1]
A1
1
R
0
0
1
0
0
0
S_D_STALL
EP2_Empty_B
EP2_Empty_B
USBREADY
Reserved0
R/W
T[0]
W
A0
0
0
0
0
0
0
0
0
0