TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 350

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
LCDFFP
(0282H)
Bit symbol
Read/Write
Reset State
Function
Reference) We recommend refresh rate values in the region of:…
(2) Refresh rate adjust function (Correct function)
LCDSCC<SCC7:0> and FP [9:0] register. The FFP value is normally set at the
same value as the ROW number, but this value can be used for correction of BCD
frequency: refresh rate.
frequency. The LCDC cannot operate correctly if a value smaller than the ROW
number is set.
Example:
Value of setting to register is only integer, SCC = 17. The floating value is disregarded.
In this case, refresh rate comes to 144.6 [Hz]
FP value is adjusted to set SCC=17 in above equation again.
Value of setting to register is only integer, FP = 496.
In this case, refresh rate comes to 140.0 [Hz]
In this function, the LBCD frequency: refresh rate is generated by setting
This function always uses a value greater than the ROW number, set to slower
The following is an example of settings:.
FP7
0
Monochrome: 70 [Hz]
4, 8, 16 grayscales and color: 140 to 200 [Hz]
7
f
140 [Hz] = 20000000 [Hz]/((SCC+1) × 16 × 480)
(SCC+1) = 20000000/(140 × 16 × 480) = 18.60
f
140 [Hz] = 20000000/(18 × 16 × FP)
FP = 496.03
SYS
BCD
[Hz] = 20 MHz, 480COM ( FP = 480 ), Target refresh rate = 140 Hz
[Hz] = f
FP6
0
6
SYS
[Hz]/((SCC+1) × 16 × FP)
LCD f
92CH21-348
FP5
0
5
FP
Register
Setting bit7 to bit0 for f
FP4
0
4
R/W
FP3
0
3
FP
FP2
0
2
FP1
0
1
TMP92CH21
2009-06-19
FP0
0
0

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