TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 445

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
(2) I/O registers setting by boot program
Note: The setting values for NAND flash, UART and USB are not shown. Set
which continues to run without asserting a reset after a boot sequence is executed .
execution of a boot sequence.
WDMOD
WDCR
SYSCR0
SYSCR1
SYSCR2
PLLCR0
PLLCR1
INTEUSB
INTETC01
Table 3.21.5 shows I/O register setting by boot program.
Take particular note of these set values when using an application system program
Also take note of the status of the CPU registers and internal RAM following
Symbol
each register where these functions are used in the system.
Table 3.21.5 I/O Register Setting by Boot Program
Set Value
2CH
B1H
40H
80H
00H
80H
00H
00H
04H
44H
Stop watchdog timer.
Disable watchdog timer.
Set system clock.
Set system clock.
Set system clock.
Where USB is used for boot, set to use PLL
output clock for f
Where USB is not used for boot, set not to use PLL
output clock for f
Set to PLL ON. Not affected by boot method.
Set USB interrupt level.
Set INTTC interrupt level.
92CH21-443
FPH
FPH
.
.
Set Content
TMP92CH21
2009-06-19

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