TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 370

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

7. LGOE0 to 2: Programmable waveform
Note1) The above explanation and figures are given for the setting below.
Note2) The minimum resolution of LGOEn is 1/16 of LCP1 cycle.
LCP1. LGOE1 is the 2nd LCP1 and LGOE2 the 3rd, and they also repeat every 3
pulses of LCP1.
registers (48bits × 3) respectively.
*
repeat portion
(example)
LGOE0 is output on the rising edge of the first LCP1 and repeats every 3 pulses of
LGOE0 to LGOE2 can be generated by 1/16 clocks of LCP1 cycle set in control
These signals can finely adjust the gate output signal and this will enables fine
adjustment of gate bias (the setting of blanking) or zoom function without
modification of data etc.
LGOEn
LGOEn
LCP1
Figure 3.14.20 Details of waveform of LGOEn for gate driver
Condition: <LCDCTL2>CPHP = 1, CPVP = 0
For CPHP = 0, CPVP = 1 setting, LCP0 and LCP1 phases are inverted.
LCP1= (LCDSCC+1 ) × f
Thus, the minimum resolution of LGOEn is (LCDSCC +1) × f
Various waveforms can be generated by writing LCDOEn5 to LCDOEn0 registers (48bits for each
signal). (When “1” is written, output is High level. When “0” is written, output is Low level. The
direction of data is from LSB to MSB. )
Various waveforms can be made ; minimum resolution is 1/16 of LCP1 clock (total 1/48)
LSB←
100000000000000110000000000000111100000000000111
1
2
3
4
92CH21-368
SYS
5
6
×16
7
8
9
→MSB
repeat portion
SYS
.
TMP92CH21
2009-06-19