TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 397

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
3.17 NAND-Flash Controller
3.17.1
Note 1: The
Note 2: The two channels cannot be accessed simultaneously. It is necessary to switch between the two channels.
Characteristics
NAND-Flash memory. The NDFC also has an ECC calculation function for error correction.
Enable are shared between the two channels. Only the operation of channel 0 is explained
here.
1) Controlled NAND-Flash interface by setting registers.
2) ECC calculating circuits. (for SCL-type)
The NAND-Flash controller (NDFC) is provided with dedicated pins for connecting with
Although the NDFC has two channels (channel 0, channel 1), all pins except for Chip
The NDFC has the following features:
external circuit.
WP
(Write Protect) pin of NAND Flash is not supported. If this function is needed, prepare it on an
92CH21-395
TMP92CH21
2009-06-19

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