TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 348

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
* 8 grayscales data format is the same as 16 grayscales, 1 pixel needs 4-bit space. LSB bit is invalid data.
LD3
LD4
LD5
LD6
LD7
LD bus output sequence
4-bit width A type
LD0
LD1
LD2
This mode is not supported by 4-bit width B type and 8-bit width B type.
Display memory image
LSB
D0
LSB
D0
4096 colors (12 bpp: R: 4 bits, G: 4 bits, B: 4 bits)
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
0
3-0 (R1)
7-4 (G1)
11-8 (B1)
15-12 (R2) → 31-28 (G3) ...
Not use
Not use
Not use
Not use
1
R1
B3
2
Address 4
Address 0
3
4
→ 19-16 (G2) ...
→ 23-20 (B2) ...
→ 27-24 (R3) ...
Figure 3.14.5 Relation of Memory Map Image and Output Data (4)
5
G1
R4
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
G4
B1
Address 1
Address 5
92CH21-346
R2
B4
G2
R5
Address 2
Address 6
B2
G5
8-bit width A type
LD0
LD1
LD2
LD3
LD4
LD5
LD6
LD7
3-0 (R1)
7-4 (G1)
11-8 (B1)
15-12 (R2) → 47-44 (B4) ...
19-16 (G2) → 51-48 (R5) ...
23-20 (B2) → 55-52 (G5) ...
27-24 (R3) → 59-56 (B5) ...
31-28 (G3) → 63-60 (R6) ...
R3
B5
Address 3
Address 7
→ 35-32 (B3) ...
→ 39-36 (R4) ...
→ 43-40 (G4) ...
TMP92CH21
2009-06-19
G3
R6
MSB
MSB
D31
D31

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