TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 522

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

Symbol
SDACR1
SDACR2
Symbol
SDCMM
SDRCR
TSICR0
TSICR1
(7) Touch screen I/F
(8) SDRAM controller
command
screen I/F
screen I/F
register 1
register 2
register 0
register 1
SDRAM
SDRAM
SDRAM
SDRAM
Name
register
register
Name
access
control
access
control
refresh
control
control
control
Touch
Touch
Address
Address
0250H
0251H
0252H
0253H
01F0H
01F1H
Always
write “0”
0: Disable
1: Enable
0: Disable
1: Enable
DBC7
TSI7
R/W
R/W
7
7
−
0
0
0
Always
write “0”
DB1024
1024
R/W
0
6
6
0
−
92CH21-520
Mode
register
set delay
time
0:1 clock
1:2 clocks
Detection
condition
0: no
touch
1: touch
De-bounce time is set by “(N × 64 − 16)/f
DB256
SMRD
PTST
“N” is sum of number which is set to “1” in bit6 to bit0.
R/W
256
0
5
R
5
0
0
INT4
interrupt
control
0: Disable
1: Enable
Write
recovery
time
0:1 clock
1:2 clocks
Number
of banks
TWIEN
SWRC
DB64
SBS
R/W
R/W
64
0
4
4
0
0
0
R/W
SPY
0 : OFF
1 : ON
Burst stop
command
0: recharge
1:Burst
Selecting ROW
address size
Refresh interval
000: 47 states
001: 78 states
010: 97 states
011: 124 states
SDRS1
all
PYEN
SBST
SRS2
R/W
DB8
R/W
3
3
0
0
0
0
0
8
stop
SPX
0 : OFF
1 : ON
Select read burst
length
00: Reserved
01: Full page read,
10: 1 word read,
11: Full page read
SCMM2
SDRS0
PXEN
SRS1
SBL1
R/W
DB4
R/W
Burst write
Single write
Single write
2
2
0
0
1
0
0
0
4
SYS
100: 156 states
101: 295 states
110: 249 states
111: 312 states
Issuing command
R/W
R/W
” − formula.
SMY
0 : OFF
1 : ON
Selecting address
Multiplex type
SMUXW1 SMUXW0
SCMM1
MYEN
SRS0
SBL0
R/W
R/W
DB2
R/W
1
1
0
0
0
0
0
0
2
TMP92CH21
2009-06-19
SMX
0 : OFF
1 : ON
SDRAM
controller
0: Disable
1: Enable
Auto
refresh
0: Disable
1: Enable
SCMM0
MXEN
SMAC
SRC
R/W
DB1
R/W
0
0
0
0
0
0
0
0
1